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The changing landscape of semiconductors

Vinod Dham
Wednesday, October 14, 2020
Vinod Dham
The Pune-born Vinod Dham grew up to be renowned as ‘Father of the Pentium Chip’. Vinod graduated engineering at the age of 21 in 1971, and he joined Teradyne Semiconductor, the only semiconductor company existed then in India. The company was located in New Delhi. Past four years in 1975, he migrated to the U.S with just $8 in his pocket. Post which there was no looking back. Vinod became a chip engineer and contributed to inventing Intel’s first flash memory chip. He further continued to manage Intel’s microprocessor projects that include the Pentium chip which elevated the company to be the world’s biggest chipmaker. Later, Vinod joined NexGen and Advanced Micro Devices. Later, he transformed into a venture capitalist initially at NewPath Ventures and later at NEA-IndoUs Ventures.

The semiconductor industry is not only among the largest manufacturing industries in the world, but also, arguably, the most important. Having enabled personal computing, mobile communications and Internet revolution over the last three decades, it is now ready to penetrate every fabric of our lives. In addition, there has been a stepwise increase in the silicon content of electronic systems with every passing generation.

The semiconductor industry, however, is going through fundamental changes. After proceeding down the same path for the past 35 years, we're on the threshold of a new semiconductor era. In the past two decades, the CMOS, scaling limits have been projected and then been defeated several times. However, going forward as we migrate to 90 nanometer and beyond, the technological issues that start cropping up are so huge that, even though innovation will continue to find a way to solve those issues, the economics of the cost to scale below 90 nanometer is beginning to exceed Moore's law* potential benefit. This will limit the number of suppliers of leading edge chips at 65nm and beyond to merely a handful.

In the future, the increasing cost and risk of leading edge design will be so costly that only highest volume application will take advantage of it. Chip designers will avoid the leading edge unless performance is absolutely necessary. The bulk of semiconductor consumption, especially in the cost- sensitive emerging Asian economies of China and India, will be centered on the optimum design node of 90 nanometer for the next decade.

The migration of wafer size from 200 mm to 300 mm and the consequent reduction in die size with migration from 130 nm to 90 nanometer will result in dramatic increases in chip count. In addition, chip production in China is slated to increase by 40 percent annually, much faster than the world average of 10 percent. Overall, this capacity increase coupled with a slowing of the technology migration treadmill will result in a perfect storm.

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