Magazine : Haritha Vuppalanchi
Current
ASIC Designer
Education
M.Tech VLSI
Industry
Semiconductors/Electronics
About Haritha Vuppalanchi
I am V. Haritha, worked in QualCore Logic Limited, Hyderabad, as a Member Technical Staff.
I am having 2.5 years of experience in Digital Front End Flow i.e., Synthesis, Timing Analysis, DFT, ATPG, Formal verification etc.
I am having 2.5 years of experience in Digital Front End Flow i.e., Synthesis, Timing Analysis, DFT, ATPG, Formal verification etc.
Haritha Vuppalanchi ’s experience
Member Technical Staff
at
Qualcore Logic
, Hyderabad, INDIA
July 2006 – December 2008
Industry: Semiconductors/Electronics
Functional area: IT Sw- Embedded / EDA / VLSI / ASIC / Chip Design
I am having 2.5 years of experience in Digital Front End Flow
i.e., Synthesis, Timing Analysis, DFT, ATPG, Formal verification
etc.
i.e., Synthesis, Timing Analysis, DFT, ATPG, Formal verification
etc.
Haritha Vuppalanchi ’s education
M.Tech [VLSI],
Vasavi College of Engineering, Ibrahimbagh, Hyderabad [June,2006]
, Hyderabad, INDIA
Haritha Vuppalanchi ’s additional information
Awards and achievements:
I am having 2.5 years of experience in Digital Front End Flow i.e., Synthesis, Timing Analysis, DFT, ATPG, Formal verification etc.
Secured with 96.64 %tile in All India GATE-2004.
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