Magazine : Shitansh Vaghela
Current
Jr IP Design Engg
Education
PG Diploma VLSI design
Industry
Semiconductors/Electronics
Shitansh Vaghela ’s experience
Jr IP Design Engg
at
System Level Solutions (India) Pvt Ltd
, Anand, INDIA
April 2008 – Currently Working
Industry: Semiconductors/Electronics
Functional area: Engineering Design / R and D
RTL coding , Development of IPs, function and logic verification,
SOC design.
SOC design.
Shitansh Vaghela ’s education
PG Diploma [VLSI design],
Sandeepani School of VLSI design [March,2008]
, Bangalore, INDIA
M.Sc [Electronics],
Department of Electronics (S.P. University) [May,2007] , Anand, INDIA
B.Sc [Instrumentation],
N.V.Patel Science Collage (S.P.University) [April,2005] , Anand, INDIA
Shitansh Vaghela ’s additional information
Interests:
Sharing knowledge at VLSI forums, movies, making freinds
Websites:
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