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June - 2003 - issue > Technology
Indium Phosphide ICs Complement CMOS
Gopal Raghavan
Thursday, May 29, 2003
INDIUM PHOSPHIDE (InP), IS A SEMICONDUCTOR material like silicon that is fast becoming the material of choice for a wide range of high-speed optoelectronic applications.

So what makes InP special? Electrons move faster in InP than in silicon. Thus InP transistors with thicker device layers have the same electron transit time (and hence device speed) as silicon-based devices with thinner device layers. The use of thinner device layers in silicon-based devices results in lower breakdown voltages (for example, power supply voltages drop from 5 V to 1.8 V as silicon transistor dimensions shrink). InP is thus the natural choice for circuits requiring both speed and high voltages. One such application is amplifiers for 10 Gbps and 40 Gbps optical transport networks. Similarly, in the optical domain, the bandgap of InP-based photodetectors (devices that convert received light to electricity) is ideally suited for light at 1.3 mm and 1.55 mm wavelengths, where optical loss in the fiber is minimal. This property of InP has enabled optical transmission over hundreds of kilometers.

Another promising area of application for InP is optical modulators (devices that convert electricity to light pulses), where the high electro-optic coefficient of InP results in low voltages and compact sizes. The net result is true single-chip monolithic integration of optical components with reduced component cost and improved performance. Such InP components are the basic building blocks for technology such as fiber to the home, which delivers high-bandwidth, affordable content (video on demand, medical diagnostics and imaging, etc.) to the end user.

In terms of electronic circuits, InP circuits hold all speed records: Inphi demonstrated a demux operating at speeds greater than 80 Gbps and 93 GHz digital logic in 2002. This achievement is even more remarkable when you note that InP device features are more than eight times larger than current silicon CMOS processes. InP device scaling—and consequently speed—has a long way to go before hitting any fundamental physical limits.

Until 1999, InP was primarily developed for high-performance military applications by defense and aerospace companies supported by government funding. Although basic transistor developments were under way during this time, no substantial progress was made towards reliability and the realization of complex circuits. During the past few years, there has been significant improvement in commercial InP foundry capability as a result of strong application demand. InP foundries such as Global Communication Semiconductors (GCS), Vitesse, and TRW (Velocium) have made substantial progress in the areas of circuit yield, performance, and reliability. Companies such as Infinera, OEpic, and Xindium have taken the approach of optoelectronic integration on a single IC and offer both InP fabrication and design.

While InP on its own yields impressive results, it is best used in combination with other materials to maximize overall system performance. For example, cost-efficient solutions for critical system applications require a combination of InP and CMOS. Here, InP is well suited for the high-speed front end with moderate transistor count. Once the signals have slowed down, however, subsequent processing is best performed with low-cost, power-efficient CMOS ICs. The Inphi architecture for optical modules uses InP for the front-end optical-to-electrical and electrical-to-optical conversion and then transitions to CMOS for the back-end system functions such as serdes and framer. This coupling results in modules with better performance that dissipate approximately half the power of competing solutions.

Another application that demonstrates the effectiveness of InP used in conjunction with CMOS is cell phone power amplifiers, where InP transistors improve efficiency for newer (3G) handsets. Similarly, InP optoelectronic ICs enable optical interconnects inside the PC to alleviate the processor memory bottleneck. For all of these applications, InP does not eliminate the need for CMOS but rather complements CMOS performance so as to address a broader market segment.

We believe the risks of commercializing InP are substantial, but so are the rewards. We have built a team of InP design, modeling, and process experts to rapidly bring this technology to the commercial marketplace. This focus has resulted in several state-of-the-art products within less than two years of the company's inception. Over the coming years, we look forward to moving InP technology into mass production and developing InP/CMOS architectures that provide innovative and cost-effective system solutions. While InP will never displace silicon, it is an excellent choice to coexist with and enhance the performance of silicon technology.

Dr. Gopal Raghavan is the Founder & CTO of Inphi Corporation, a semiconductor firm in Southern California. He has over 18 years of experience in high-speed circuit design and device modeling. From 1984 to 1994, Dr. Raghavan was a senior engineer with Intel Corporation engaged in CMOS circuit design and process development. Prior to founding Inphi, Dr. Raghavan worked at Conexant Systems as a principal engineer designing integrated circuits for 10 Gbps SONET applications. Dr. Raghavan has won several awards, including the Hughes Hyland Patent Award (1998) and the Ross Tucker Award from TMS/IEEE (1993). He holds 10 patents and has published more than 30 technical publications. Dr. Raghavan holds a B. Tech degree in electrical engineering from the Indian Institute of Technology as well as M.S. and Ph.D. degrees in electrical engineering from Stanford University.

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