DXCorr Design: Strengthening the SoC Design Space

Nirmalya Ghosh, CEO

From designing the next generation devices to bringing the latest processing and architecture technologies to market, the semiconductor industry continues to face new challenges at all times. Today’s increasingly large and complex system-on-chip (SoC) designs in deep submicron technologies have created a tough situation for the designing engineers. Whenever the industry shifts from one bleeding edge technology to another, the rules change and new constraints emerge leaving the designers perplexed. In such cases, the designers find it difficult to abide by the new rules while designing a chip. They implement the digital designs in bits and pieces, but customers look for a partner who has considerable knowledge when it comes to semiconductor design process. This is where DXCorr Design comes in. The company is focused on understanding the implementation of SoC and analyzing it in terms of power, performance, and area.

California-based DXCorr forms the final layout of a chip—GDSII— for several organizations that further fabricate it to get the system design. “We understand the 7nm technology node extremely well, and if a design has to be taped out, we do it faster and better than anyone else when it comes to that particular type of technology,” says Nirmalya Ghosh, CEO, DXCorr.

DXCorr works closely with organizations that deal with the back-end of the SoC design and lack knowledge in the front-end

The company is committed to offering innovative solutions in the SoC design space to address the challenges prevailing in the industry.

DXCorr works closely with organizations that deal with the back-end of the SoC design and lack knowledge in the front-end. The firm helps such entities to make system-level trade-offs and architecture-level decisions. DXCorr designs memory compilers such as SRAMs, MRAMs, TCAMs as well as standard cell libraries to address the stringent power, performance, and area requirements for SoC designs. It also delivers Cache compiler as a full subsystem that eliminates the need to use memory compiler for building the Cache.

Owing to its full-custom design that offers a range of possibilities for automation, the company has witnessed a prominent breakthrough in the cryptocurrency. DXCorr has introduced a cryptocurrency engine that reduces the active power to half and allows bitcoin miners to mine quicker, a task that gets harder with numerous complexities involved in it.

The firm works as a research and development extension of renowned organizations like GlobalFoundries, Intel, Samsung, GUC, and several others.
As a part of SoC design offerings, DXCorr offers solutions that cover every aspect of the design space. “Customers demand power-efficient designs in the implementation of SoC where mainstream embedded processors fails to fit in the power profile, as they are power hungry,” mentions Ghosh. As computing power is an essential parameter in SoC design, DXCorr optimizes the whole system with RISC-V architecture options which reduces the power constraints for a chip. The company is working in partnership with several organizations that are developing the complete architecture of the system to solve customers’ problems related to low power designs.

DXCorr is developing self-content, capable artificial intelligence (AI) system that requires local memory and computing power, which, at present, is in its initial stage of development. From the system and software stack’s side, the firm is working towards bringing the capabilities of 7nm and latest technologies to market. DXCorr is also extending its R&D operations for AI and Deep Neural Network (DNN) structures to be able to automate using the 12nm and 7nm technology nodes. The company is passionate about staying ahead of its competitors and plans to do that by bringing RISC-V, 7nm, and 5nm technology node to the table. DXCorr wishes to be a global player in providing IPs like TCAM, MRAMs, Std-cell library automation, and self-sufficient AI systems.