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Intel searches for the right 3-D chip app
By siliconindia
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Friday, 11 December 2009, 18:37 IST |
1 Comments
Burlingame: Chip maker Intel is still exploring the future use of 3-D devices based on through-silicon vias (TSVs), but the company said that it has still not found the right application or 'product intercept' for the technology.
Currently, chip makers are shipping limited 3-D devices based on TSVs, mainly CMOS image sensors, MEMS, and, to some degree, power amplifiers, reports EE Times. But for years, IBM, Intel and others have been looking at stacking microprocessors, memory and other functions using TSV technology.
Experts define a true 3-D package as one that stacks various chips vertically and then connects them by deploying TSVs. The aim is to shorten the interconnections between the chips, reduce die sizes and boost device bandwidths. But in processor designs, there are several stumbling blocks for TSVs, including cost, heat dissipation, standards, lack of electronic design automation (EDA) tools and others.
There are also economic issues: It is a challenge to develop a TSV-based chip that will meet market requirements for original equipment manufacturers (OEMs) and will actually make money for chip makers themselves. This is especially true for processor chip giant Intel, which can't afford to develop a technology for technology's sake. Like others, Intel must devise a product that can realize a return-on-investment.
Intel is still in search of the right 3-D chip application. "3-D is attractive if we can find the right product intercept," said Jerry Bautista, Director of Technology Management at Intel. "We are still looking at the right product intercept." For years, Intel has been looking at 3-D chip technology. In this arena, it has been exploring various 3-D stacking technologies, such as TSVs, silicon interposers and wafer bumping.
