Intel India co-develops 80 core teraflop chip

Thursday, 22 February 2007, 06:00 Hrs
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Bangalore: Intel India Develoment center (IIDC)along with Intel Oregon co-developed the 80-core teraflop chip. The IIDC handled more that 50 percent of the chip development.

The chip has a powerful programmable processor that can undertake trillions pf calculations per second, consuming only 62 watts of power.

"The multi-core chip with greater computing horse power can be used for diverse research applications such as scientific experiments, weather forecasting, astronomical calculations, oil exploration, financial services, entertainment and personal media services involving huge data processing and number-crunching," Intel India research centre director Vittal Kini said at a preview of the product in Bangalore.

Collaborating with Intel's technology group's circuit research lab at Oregon in the US, the 20-member Indian research team headed by engineering manager Vasantha Erraguntla played a central role in developing the teraflops research chip in a record 20 months.

The engineering team of IIDC contributed about 50 percent of the work consisting of logic, circuit and physical design, while the Oregon centre undertook integration and fabrication of the chip at the company's fab in Ireland.

"By advancing into the era of tera, we have demonstrated the power of global collaboration and the capabilities of the Indian engineering talent. Tera-scale performance and the ability to move terabytes of data will play a pivotal role in future computers with ubiquitous access to the Internet by powering new applications for education and collaboration," Erraguntla said.

Intel hopes the next generation of computers and servers in the coming years will be able to make use of the 80-core processor for a variety of applications once thought to be in the realm of science fiction such as "Star Trek" shows.

"The potential of the multi-core chip is immense, for it throws up a host of opportunities to use it in artificial intelligence, instant video communications, photo-realistic games, multimedia data mining and real-time speech recognition," Kini pointed out.

Though Intel has no immediate plans to bring the chip designed with floating point cores to the market, it intends to demonstrate the product to its partners in the industry for offering insights in new silicon design methodologies, high bandwidth inter-connects and energy management approaches.

The 65-nanometre chip is embedded with 100 million transistors and features an innovative tile design in which 80 smaller cores are replicated as tiles. Going forward, Intel plans to use the 45-nanometer silicon wafer for making the teraflops chip with multi-core processors containing billions of transistors.

The teraflops chip also features a mesh-like network-on-a-chip architecture for super-high performance between the cores and moving terabits of data per second inside the chip.

"The Intel tera-scale computing research programme has over 100 projects on hand to explore other architectural, software and system design challenges," Kini added.

Incidentally, the 80-core teraflop chip is a big leap in frontier technology as against the first teraflops performance achieved over a decade ago on the ASCI Red Supercomputer built by Intel for the Sandia national laboratory in the US.

"That computer took up more than 2,000 square feet, was powered by 10,000 Pentium pro-processors and consumed over 500 kilowatts of power," Erraguntala recalled.
Source: IANS
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