Girish Ravandur
Current
Senior VLSI/System Design Eng...
Education
MS Microelectronics
Girish Ravandur ’s experience
Senior Engineer
at
Wipro Technologies
, Bangalore
Working/Currently
Functional Verification of ASIC / FPGA Devices using
HVLs. Design entry using HDLs
HVLs. Design entry using HDLs
Girish Ravandur ’s education
MS [Microelectronics],
Birla Institute of Technology & Science (BITS), Pilani [Currently,Studying]
, Does not matter
Girish Ravandur ’s additional information
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