RISC-V Foundation Announces Initial Keynote Speakers for Inaugural RISC-V Summit


The RISC-V, a nonprofit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA),  announced the keynotes for the first annual RISC-V Summit at the Santa Clara Convention Center in Santa Clara, Calif. from Dec. 3-6, 2018.

The Summit, in partnership with Informa’s Knowledge & NetworkingDivision, KNect365, will gather the RISC-V community for a multi-trackconference featuring tutorials, exhibitions and networking receptions. Leading technology companies and research institutions will share notable product updates, projects and implementations that accelerate the RISC-V ecosystem and reveal the future path for RISC-V. The initial keynotes for the Summit will be conducted by Antmicro, Facebook, Microchip, NXP, SiFive and Western Digital.

  • Michael Gielda, Vice President Business Development of Antmicro: “Accelerating Innovation: Why Google's TPU Was Just the Start”
  • Robert Shearer, Director of Silicon Architecture and Modeling of Facebook: “The 100X Problem – How to Redefine Silicon for Augmented Reality”
  • Patrick Johnson, Vice President, Mixed Signal and FPGA Business Units of Microchip: “Enabling the Freedom to Innovate”
  • Rob Oshana, Vice President, Software Engineering of NXP: “Deepening the RISC-V Ecosystem to Drive Industry-Wide Adoption”
  • Yunsup Lee, Chief Technology Officer of SiFive: “Opportunities and Challenges of Building Silicon in the Cloud”
  • Martin Fink, Executive Vice President and Chief Technology Officer of Western Digital: “Unleashing Innovation from Core to Edge”

“This year has been a hallmark one for the RISC-V Foundation,” said Rick O’Connor, executive director of the RISC-V Foundation. “The RISC-V ecosystem is continuing to grow at a rapid pace, surpassing 150 member companies from 25 countries across the world. We’re excited to bring the RISC-V community together at the inaugural RISC-V Summit and end the year continuing the momentum from all the RISC-V milestones that have been achieved thus far.”

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