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August - 2009 - issue > Cover Story
nSys-Verification-Made-Easy
Aritra Bhattacharya
Friday, August 7, 2009
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Atul Bhatia is busy modelling nSys the McDonald way. This is not only in terms of the scale and reach of the latter, but also in the core business idea- Productization.

“Mc Donald’s productised burgers, and we, at nSys, are in the business of productising Verification,” says Bhatia, the CEO of the company that leverages the “world’s largest portfolio of Verification IPs” it has developed, to provide products and services to accelerate designs of its customers developing ASICs or SoC.

“Since our inception in 2001, we have been dedicatedly focussed on Verification IPs,” he said, adding that today, nSys is the only company (http://www.nsysinc.com) that is wholly focussed on Verification. There are other players who provide Verification IPs, but they also have other interests. The specialization helps deliver value to customers and also deliver solutions early, claims the CEO. For instance, nSys recently showcased the Verification IP for PCIe 3.0, which is currently at preliminary revision 0.5, at the PCI-SIG DevCon 2009, held in Santa Clara. Incidentally, it was one among only a couple of companies to showcase the solution, and have already seized their first order for the same.




The VIP Arena


Only 20 percent of customers worldwide have shifted to third party Verification IP providers, reckons Bhatia, but he also believes that people will transition to this over time.

As a practice, a lot of companies still architect their own Verification IPs. But doing this is becoming increasingly difficult, given the plethora of protocols that such designs must cater to. As the world progresses towards the nano scale of measurements, more and more features are expected, and offered, which correspondingly translates into more protocols in designs. One needs to identify test scenarios for each such protocol, then write out the tests, and then perform them. This takes excruciatingly long, and sets back companies’ time-to-market comprehensively. Add to that the fact that engineers are not too keen to identify and architect test cases, and the ground becomes more slippery.

Also, individual companies that are trying to develop Verification IPs have very little access to the kind of feedback that turns into a Delight-the-Customer practice for a service provider. “When we work with the market biggies, our learning from one, translates into a habit/ serving practice for all. And that is what makes our products what they are. It is the customer’s support that enables us to serve better,” shares Bhatia.

Despite the above, resistance to change impedes prospective customers from switching over to third party Verification IP providers.

“Companies that have developed the Verification IPs in-house earlier, are reluctant to switch if their in-house kit is working fine,” says Bhatia. But advancements in technology and the emergence of newer protocols at a meteoric pace is forcing change.

For instance, with regards to the PCIe 3.0 protocol, supporting the new encoding scheme and maintaining backward compatibility to the earlier versions of the spec are the two chief implementation challenges engineers face.

In fact, one test engineer from one of the big in-house verification IP developing corporations, for the PCIe 3.0 protocol, said that it is requiring significantly more gates in the FPGA than his employer uses in a protocol analyzer, and merely finding the start of a new byte is a much more complex task.
It is situations like this which involves the introduction of new protocols that is forcing companies to look at third party Verification IP providers. “Apart from the inherent difficulties in building a Verification IP, companies also require a large team to support the Verification IP, which costs them a lot,” says Bhatia. He explains that what customers pay for a single Verification IP license is just a fraction of what the entire design cycle costs. The savings can be anywhere between half a million to a million dollars. Accessing Verification IPs from specialised vendors also saves customers 10-15 man years of time, and allows them to tape out their products quickly.

A case in point: Matrox Graphics

Matrox Graphics is one of the leading manufacturers of graphics solutions for professionals and has been delivering 2D/ 3D, and video graphics accelerators for more than a quarter of a century.

“While the first PCI Express chip development stages in Matrox were being planned, they decided to go in for a third party solution and to evaluate the various Verification IP solutions available in the market,” says Bhatia. The main driver behind this decision, he notes, was that they wanted to focus on their design. Since PCIe is a complex protocol, they wanted an independent, unbiased interpretation of a third party which they could compare against. The solution would need to weed out any bugs and tape-out a successful product, in keeping with the pace of development of the chip.

Andre Testa, Team Leader-ASIC Engineering, at Matrox Graphics says his company was looking for a commercial Verification IP which could be easily integrated with their verification environment. Matrox zeroed in on nSys Verification Suite (nVS) for PCI Express, a product developed by nSys.

Following deployment of the nVS, Matrox taped out successfully on schedule. Says Testa, “nVS is very intuitive to use, and has all the flexibility needed to generate all desired PCI Express traffic in a very simple manner.”

Edge through breadth

So what was it that compelled Matrox, and also a host of nSys’ other customers, to choose the company’s Verification IP?

In the words of Testa, “The feature set presented in their user guide was really strong; that made nSys our prime choice.”

Also, recently nSys has seen a lot of traction in its customer base because of the range of Verification IPs it offers. These cater to the PCI Express family, the storage family, the communications family, Ethernet, ARM processors, USBs and include bus functional models, monitors, checkers and built-in test suites for random, directed and error tests, and are available in both encrypted and source code form. There are also multiple instantiations for creating complex verification environments, error injection, and detection. “Today, we have over 100 customers including industry leaders from networking, storage and FPGA segments. Our products are great because all our customers have given us inputs based upon their internal best-practices to help us improve our products," says Bhatia.

There’s one more reason behind nSys’ success: “Our Verification IP is written in native Verilog and SystemVerilog, while competitors use other languages such as Vera, C or System C. This is a huge benefit, given that most designers, who eventually use the Verification IPs, are familiar with Verilog and SystemVerilog. This makes it easy for them to use nSys’ solutions,” says Jitendra Puri, Engineering Director. Verilog is also efficiently portable across simulators. This is not possible if the Verification IP is written in any other proprietary language. Verilog’s portability enhances performance, in that no additional layers are required.

“You can be up and running with our suites in 30 minutes, we actually strive for ‘Verification Made Easy’,” said Bhatia.

For instance, having implemented a by-16 Endpoint device, Matrox needed to fully support all possible packet sequencing scenarios directed to its device. Therefore, needing an easy yet efficient way to reproduce all those scenarios was of prime importance.

nSys’ verification suite (called nVS, also because competitors are envious of it, says Bhatia) includes different test cases for different configuration setups. This makes it readily usable, and easy to handle across designs. Also, now the company has a proven track record; its products are being used by several customers. It is also compliant with other products in the market.

“Increasingly, customers come to us for a Verification IP pertaining to one protocol, and extend the association by buying for other protocols too, progressing to use all solutions they need,” says Bhatia.

“By providing customers with the option of an access to the source code, we offer for them to actually see what’s happening. That builds trust,” adds Bhatia.

Overcoming Roadblocks

Despite these positives, third party Verification IPs did not really come into vogue early on when Bhatia started his company in 2001.

“Initially, everybody was using different languages, and had their own proprietary environments. There was no structured way of doing verification,” he says. Big players wrote their own codes; problems, however, started arising when it was difficult to use those codes in multiple designs.

There’s a structured way in which nSys utilised this chink and engaged with customers to win them over to its side, thereby also creating a playing field for independent Verification IP providers:

Independent Interpretation: The most important benefit of buying the Verification IP rather than making it, argued Bhatia, is that a commercial Verification IP provides a totally independent, clear and unambiguous interpretation of the specifications of a protocol for which it is designed. Until the time when the specifications themselves are written such that they have no ambiguity, this independent interpretation is invaluable. It gets even more important when the specifications are those of a complex protocol. In case the commercial Verification IP is already proven by use with RTL designs of other users, the value increases to several times of its cost to the user.

Availability of Test Suites: Verification IP providers like nSys equip their offerings not only with Bus Function Models, Monitor and Protocol Checkers, but also Test Suites. Availability of test cases in the source code makes it easier to modify and create additional cases unique to every user’s designs.

Packaging: Just as a home-made dish cannot be packaged as attractively as one that comes from a restaurant, an in-house Verification IP is also not packaged as well as a commercial Verification IP, argued Bhatia. Some of the distinct features of the packaging that are very difficult to incorporate in an in-house Verification IP are—availability of a well-documented user manual, flash-based tutorials, comprehensive FAQs based on queries faced by existing users, a self-service bug tracking portal, application notes and a well-designed GUI.

In case the Verification IP provider is offering a family of Verification IPs, the additional features of packaging would be consistency of interface, installation, operation, and documentation across the Verification IP family. Since the APIs for a family would be well thought out and consistent across the family of Verification IP, it would reduce the requirement of learning the API while using additional interfaces.

FPGA Designs: At the other end of the spectrum of the develop-or-buy decision are the FPGA developers who do not even consider using simulation for verification. They feel that they would find the bugs at the system level in any case and the bug would just require a change in the RTL rather than throw away the chip as would be the case for an ASIC developer. This belittles the complexity of FPGA designs brought about by increase in their size.

“Fortunately, FPGA developers are becoming aware of this and have begun verifying their designs extensively in simulation too,” says Bhatia.

RTL IP: One of the ways of overcoming the productivity gap is the use of Design or RTL IP. A 2002 study by Collett International Research revealed that 14 percent of all chips that failed had bugs in reused components or imported IP. The other key problem is that verification should be able to verify the IP at the block level and also provide features for system level verification to ensure the correctness of integration of the IP with rest of the design.

Bundled VIP: It has been observed that even if an RTL IP is field-proven, it may still have several bugs that are brought out by a new design (as luck would have it). A free Verification IP that may be available with RTL IP unless it is from a 3rd party vendor is not good enough for use in a commercial project. In fact, the extra effort spent in using the free or scaled-down Verification IP is several times the cost of a good 3rd party full feature Verification IP.

Though these arguments were, in themselves, fool-proof, Bhatia acknowledges that it was still difficult to win over customers initially.

“People understood the need for third party Verification IP providers, but wanted to give their business to a provider who they knew had good traction,” recalls Bhatia. He says he felt like the rookie who goes around looking for jobs, only to be told that the prospective employers are looking for experienced people. “But how will I have experience if no one gives me a job,” he wondered, carrying forward the line of thought. He remembers standing at the 2003 PCI Express DevCon, and being asked “Who is your customer?”

Eventually, someone did believe in nSys; it was Matrox Graphics, whose case was cited earlier. “They felt we were the only guys who understood their requirements,” notes Bhatia. Things have changed a lot since. For starters, Matrox Graphics became a reference customer.

Gaining a stronghold

From scouting for its first customer, nSys has reached a point where it has a good sense of the markets it operates in. Incidentally, 80 percent of its customers come from the US, and around 20 percent from Taiwan. The Taiwanese are early adopters and adjust quickly, quips Bhatia.

“We constantly talk to customers to understand their needs and evaluate the need for enhancing our suite,” he notes. Before charting out any release, Bhatia’s team at nSys alerts customers, telling them what the company is coming out with. Depending on the feedback, they go ahead with the actual release or shelve it.

Years in the market and the breadth of experience have also enabled the company to deal with the situation where customers ask for something, and nSys decides not to develop it. For instance, recalls Bhatia, one of the customers was insisting on a Verification IP for MRIOV. The team at nSys decided not to venture into the area at that point in time.

“It takes guts to say no to prospective business,” says Bhatia. But he did so then, fearing long-term losses. Today, his stand has been vindicated. MRIOV has not taken off, nor have other protocols like Advanced Switching Interface and wireless USB. These are things that the company did not invest in, and has been able to avoid disappointments and losses thus.

nSys has also tied up with companies like Mentor Graphics and Cadence and Synopsys, as alliance partners. This ensures that nSys products can work across simulators from big EDA vendors, thereby serving needs of mutual customers, and it saves the end customer the hassle of scurrying from one player to another.

Road ahead

“We are now well-positioned as a Verification IP company,” says Bhatia. He expects a lot more people to start using nSys’ solutions. Having tasted success with productizing Verification IPs, we nSys is now working on productizing verification services as "Independent Verification Services". Given the emerging geometry; given smaller sizes, verification IPs are also becoming increasingly complex—in ways, more complex than IPs. This indeed is good news to Bhatia and his team as it promises new opportunities.

To add to the list, companies these days expect the Verification IP to be ready before the protocol itself. That’s a tough task for a Verification IP provider. But nSys is surely bracing for the challenge.

In fact, Bhatia says nSys is like this photographer whose job is to cover a race. He starts the race along with the participants and runs backwards, all the while photographing them. To make sure he does not lose out on moments (here, new customers), the photographer, running backwards, must finish before the participants of the race, or the developers of a protocol.


Website
: http://www.nsysinc.com"
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Reader's comments(1)
1:It's indeed great to see you on the cover page of Silicon India - we are proud of you !!!

Chanders
Posted by: subhash chander - 07th Aug 2009
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