During early 80's, most semiconductor companies developed and maintained their own CAD software for chip design. In late 80's, with the emergence of EDA industry, the transition occurred with semiconductor companies relying on commercial EDA software. The 90's saw tremendous growth in the Semiconductor as well as the EDA industry, as more and more automated EDA tools became available reducing the chip design cycle. These commercially available synthesis tools enabled designers to describe design functionality at higher level of abstraction using languages like Verilog and VHDL and subsequently synthesize it into lower level hardware gates. The ability to synthesize massive amount of logic and automatically place and route it in relatively short duration gave rise to what is known today as "System-On-Chip" or SOC.
During this time, the sub micron geometries kept on shrinking at a fast pace. Each shrinking node of the technology introduced its own timing sign-off criteria such as increased number of timing corners and other parameters. Also, the fabrication cost associated with deep sub-micron technologies exploded. In order to mitigate the cost factor, most semiconductor companies design large SoC's targeting diverse market applications and pack enough functionality in a single die so as to differentiate themselves from competition.
Today we are at a turning point where the process geometry is shrinking at a much faster rate than before. With bewildering number of devices and connected platforms, the unrelenting pressure on semiconductor industry is to produce chips with lowest power dissipation while incorporating numerous functions on a single die; all the while doing that faster than anyone else in order to meet the ever critical market window.
Change from the norm is generally resisted. However, with continued design cycle shrinkage, change is inevitable. Two components make up the chip design; functionality and timing.
Excellicon was started with the realization that the continued rate of explosive chip production cycles cannot be sustained. There was a need for new generation of EDA tools that were more intelligent, sophisticated and provide higher level of automation. Management of vast amount of timing data during the implementation phase of chip design requires analysis and verification of the timing data. Excellicon uses disruptive technology to manage and to automatically generate the timing constraints needed for the chip implementation phase.
Every year new companies announce cutting edge products that differentiate from traditional products. Some succeed while others do not. It is not just about the product but also about establishing market presence, working with customers who are resistant to change and finally a product that uses disruptive technology yet provides a gradual link to existing solutions. In the end it is all about sustainability, focus towards the goal and finally passion for what one believes in.