Programmable, Software Definable, and Cognitive Radios
Date: Tuesday , December 01, 2009
The wireless communications world is undergoing rapid changes to accommodate the unrelenting appetite for content while remaining untethered and mobile. Desktop computers have given way to laptop computers with wireless connectivity and laptops are slowly giving way to smartphones with increased connectivity. Over the years, a myriad of wireless standards have cropped up to satisfy this growing need for multimedia content while on the move. An example of this is seen in the cellular handset or smartphone market. We have evolved from the Motorola DynaTAC 8000X of the early 80’s that weigh at over two pounds, used one wireless standard for voice only, and had a one-hour battery life to the Apple iPhone 3GS of 2009 that weighs just 4.8 ounces, utilizes connectivity using any of the eight different wireless standards using six (or nine, depending on how you count them) different radios.
Each of these wireless standards has evolved and has been optimized for a particular radio spectrum and usage model. Newer standards such as WiMAX, LTE (long term evolution), UWB (ultra wideband), and DVB-T (digital video broadcasting-terrestrial) continue to evolve. The need to connect to multiple radio standards, the increased costs associated with developing a new chip for each standard, and the desire to change frequencies and modulation formats for newer wireless standards as they evolve have increased the desire to develop radios that are software programmable to work with different radio standards. Estimates suggest that over 25 percent of the bill-of-materials (BOM) cost for the iPhone is attributable to having the variety of different radios. The software programmable design problem consists of a) developing programmable digital circuits that can be coerced to modulate and demodulate and adapt MAC (media access) protocols for the various standards, b) design sufficiently efficient RF and analog baseband circuits that can be programmed to adapt to the different radio frequencies and dynamic ranges, and c) develop the software that can make all of this work together. Techniques to address a) and c) have existed for some time. This article focuses on discussing issues associated with b), i.e., designing efficient RF and analog baseband circuits that can be programmed to adapt to the different radio frequencies and dynamic ranges.
The term ‘software defined radio’ (SDR) was coined by J. Mitola in 1991, with the idea of attach an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) to the antenna and do everything programmable in the digital domain. Though we will not go into the details here, it is easy to show that such an approach, if possible at all, would be extremely power hungry. A part of the reason that makes this technique inefficient is that we are converting the entire signal bandwidth from DC to half the ADC clock frequency when, in fact, we may only be interested in a narrow range of signals around a center frequency. Contrary to popular belief, this focusing, or filtering, is done more power efficiently in the analog domain. So, the traditional way of selecting the band of interest, attenuating out-of-band blockers (interfering signals), providing some gain to counter finite noise figures, and then down-converting to a frequency close to DC (baseband) as soon as possible still provides the most efficient designs. So, though it is easy to incorporate programmability into the digital domain, converting non-relevant signals into the digital domain is wasteful of power.
However, we would still like to design a radio frontend that is able to focus on different RF center frequencies and accommodate varying baseband signal bandwidths. The final filtering, carrier recovery, and modulation and demodulation can continue to be done using a digital baseband, but now in a more programmable form. Traditionally, RF frontends have been designed to be efficient by utilizing the bandpass filtering capabilities of passive inductor-capacitor (L-C) tanks. Unfortunately, it has traditionally not been possible to move the center frequency of such designs by a wide margin. For example, if we want the RF frontend to be programmable for both quad band GSM and WiFi (802.11abg) we need to be able to change the RF frontend center frequency from 850 MHz to 5825 MHz. Accommodating more than a 25 percent change in the center frequency of L-C tanks has been difficult as only the capacitance is normally varied and the center frequency is inversely proportional to the square-root of L-C.
As the operating frequencies of current CMOS technologies have continued to soar it is now possible to use sample-data analog systems that retain some of the programmability of digital circuits, while still continuing to be very power efficient. Such switched-capacitor circuits that can be programmed for a wide range of frequencies are extremely efficient for filtering and for generating programmable gains. Though switched-capacitor circuits have been used for an extremely long time, mostly for filtering and data converters, their introduction into programmable RF circuits is only recent. Most of these programmable radio receivers utilize a similar architecture. The RF signal at the antenna is slightly amplified using a broadband low-noise amplifier (LNA), down-converted to the baseband using a wide tuning range local oscillator (LO), and then filtered using a series of widely programmable switched-capacitor filters. They often use variants of finite-impulse-response (FIR) filters that are easily made programmable by varying the clock frequency. The filtered down-converted signal is then converted into the digital domain using a variety of ADCs. Designing efficient programmable ADCs that are able to vary their sample rate and dynamic range by large amounts is still an active research topic. Generating the wide range of LO frequencies is now possible by utilizing a variety of divider and injection architectures and by varying both the Ls and the Cs in their tanks.
However, designing completely programmable transmitter architectures has proven to be more elusive. Designing low-power programmable transmitters is less problematic than designing a linear, high-efficiency programmable transmitter architecture that is both frequency and power agile. The primary problem here is that the power amplifier (PA) in the transmitter usually consumes significant current from the battery and the designer is forced to use a variety of matching and power combining techniques to generate the power efficiently. In fact, even for fixed frequency transceivers the majority of the design is now regularly done in CMOS, except for the PA and transmit-receive switches that are regularly integrated into a frontend-module (FEM). The good news is that both the academia and the industry continue to make rapid progress in this area.
It is interesting to consider the impact on the overall wireless infrastructure by the availability of completely programmable radios. The FCC has traditionally auctioned off the radio spectrum with the basic understanding that users would utilize fixed radios that focus on a small set of frequencies. However, while our demand for the wireless bandwidth continues to grow, we find wide swaths of the RF spectrum that have been allocated are lying under-utilized. As a potential work around to this issue, in 1999, J. Mitola and G. Q. Maguire proposed the idea of a cognitive radio. A cognitive radio is one that senses its RF environment, figures out what spectrum is free, and then appropriately generates the right RF frequencies and protocols. Clearly, there is a lot of legacy and primary user issues that need to be solved before cognitive radios see wide usage. However, our desire to remain untetherd and the increased demand for higher bandwidths will continue to force changes to the wireless world as we see it. Programmable, software definable, and cognitive radios have provided a wealth of research ideas to my team and those of other academic and industrial groups.
The author is Ramesh Harjani, Professor, Department of Electrical & Computer Engineering, University of Minnesota