Low Power to the People!

Date:   Monday , July 02, 2012

Apache acquired Sequence Design in 2009. Prior to the acquisition, Vic served as Sequence's President and CEO since 2002 and was instrumental in driving the Company's vision in the low-power chip design software solutions for leading worldwide customers. Vic was named "Entrepreneur of the Month" by SiliconIndia magazine and secured Sequence a spot in Reed Electronics' "50 Electronics Companies to Watch." Before joining Sequence he held executive management positions with Avant! and Meta-Software, which he helped take public with a market cap of $160 million, and served in engineering and marketing roles with several legendary Silicon Valley companies, including VLSI and National Semiconductor.

Key trends driving the industry and ANSYS-Apache

In today's connected world, several factors are driving the increasing demand for more power-efficient ICs and electronic systems, including:

• The proliferation of high performance mobile devices, such as smartphones and tablet computers. NPD researchers predict that the mobile processor sector will grow at a rate of 22 percent each year through 2016. That's after this area already nearly doubled in 2011 when mobile processor growth exceeded 43 percent. The escalating use and functionality of these devices is driving manufacturers to develop more power-efficient electronic components that extend battery life.

• The growing demand for smaller form factor electronic systems. This requires designers to deliver products that consume less power while still satisfying performance requirements. IC and electronic system manufacturers have begun marketing battery life as a key differentiating product feature. In addition, the explosion in system-to-system wireless communications is amplifying the amount of noise within and between ICs, threatening the system with malfunction or failure.

• On the other end of power consumption spectrum from mobile side is the side of high-performance computing (HPC) applications like farms of servers which are in worldwide data centers. Rising electricity costs for information technology infrastructure demand more power-efficient products that consume less energy. According to IDC, the expense associated with powering and cooling the worldwide server installed base increased at a compound annual growth rate of 9.5% from 2005 to 2009. As a result, data center operators are seeking solutions that reduce electricity costs without sacrificing performance. In a recent report by Oregon Live, it was stated that Google’s global power consumption is ~258 million watts, roughly equal to 188,000 homes to service the user base doing Google searches to doing a myriad of daily functions on-line.

Meeting this demand for more power-efficient ICs and electronic systems poses significant challenges for engineers. These engineers must create designs that meet increasingly stringent power specification limits, or power budgets, while simultaneously delivering reliable and consistent power to all components of ICs and electronic systems. They must also create designs that mitigate adverse effects caused by power-induced signal interference to prevent failures or performance degradation or to satisfy regulatory requirements.

Various modes of operation such as e-mails, messages, Facebook, HD-video and audio streaming, and GPS location-based services consume different levels of power because of varying degrees of switching activity within an the IC which a mobile device or a server box contains. As an example, processor chip inside a smartphone must meet requirements for power consumption in active, standby, dormant, charging and shutdown modes.

Power Budgeting Challenges and ANSYS-Apache Solution

Suppose you are an IC designer for a mobile application with a 3W power consumption target established by the system thermal limit, battery life, component reliability and competitiveness in the market place. Any hand held device that consumes more than 3W of power feels uncomfortable in a human hand after a few minutes.

Obtaining accurate power numbers and reducing power are critical in addressing the challenges for increased functionality and performance while maintaining existing power budgets. Ensuring that design operating modes and applications meet their individual power budgets adds to the challenge, and calls for a comprehensive power budgeting solution.

Chip design software solution providers must meet tool challenges in the IC design flow related to power budgeting and provide products and methodology for IC designers doing power-efficient designs in all kinds of applications.

ANSYS-Apache provides innovative power analysis and optimization solutions that enable engineers to design and deliver products that meet stringent power specification limits, while still reliably and consistently delivering power to the entire system and mitigating failures or performance degradation caused by power-induced noise. Apache's comprehensive suite of integrated software and methodologies spans a full spectrum of power, noise and reliability solutions including power reduction, power and signal integrity, thermal management, and analyzing complex physical effects like electro-migration, electro-static discharge, and electro-magnetic interference from early in the design phase through final system sign-off.

Chip-Package-System power methodologies that facilitate effective coordination among multiple engineering teams and help drive the electronic eco-system.

Power is the New Driver

In all cases, power is the driver. Power budgeting is an important issue which is now keeping the decision makers in IC and system companies awake at night. As an industry, we have to think of this power challenge as an issue that must be addressed in a holistic way in the design cycle at all levels of IC design abstraction from architectural decisions to application software, to the physical implementation of a chip to packaging and PCBs.
Designing power and energy-efficient ICs is ubiquitous and forever!