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The Smart Techie was renamed Siliconindia India Edition starting Feb 2012 to continue the nearly two decade track record of excellence of our US edition.

Semiconductors in the 21st Century – What awaits us!

Ram Gopalan
Friday, February 2, 2007
Ram Gopalan
With the increasing complexity of VLSI designs (10M+ gates), time-to-market pressures, movement to finer process geometry’s (sub-sub micron) and changes in fabrication and EDA tools, it is clear that semiconductor design and manufacturing as we know it cannot be the same well into the 21st century. The microelectronics industry is facing unprecedented challenges at all levels—semiconductor process technology, fabrication/manufacturing equipment, design methodology and EDA tools.

The current silicon technology (CMOS scaling), the engine that delivered higher density and performance at lower power and cost in the past, will encounter fundamental (physics) limiting factors and could be running out of steam below 50nm line width dimensions, with the main limitation being quantum mechanical tunneling through a few atomic layers of silicon dioxide, the miraculous material that lies at the heart of all VLSI technology. However that does not mean scaling will come to a screeching halt. Devices will be pushed further at the expense of process complexity and chip power. It will be expensive to push up the clock frequency near the scaling limit, hence massive parallelism may become the preferred alternative to increase processor(s) throughput.

In the next decade though, two opposing forces at work, specialization and consolidation will drive the microelectronics industry. Integration and high frequency capability of scaled CMOS devices enable new, system-on-a-chip applications. Yield and cost issues will be a constant challenge for SOCs. Eventually chip economics can only be justified by increased wafer size like the move to 300mm (12”) wafers which provide >2X die area over 8” wafers. This move entails significant changes in semiconductor manufacturing equipment technologies.

While there are numerous new device concepts being explored today, currently none shows the promise to replace Silicon CMOS in the foreseeable future. Today’s VLSI technology based on Si, SiO2 and CMOS is the ultimate outcome of the survival of the fittest and will probably continue to live on for the next decade and beyond. Complete paradigm shifts in the form of phototransistors or molecular (DNA) based electronic circuits may be the way of life towards the end of the 21st century?

On the fabrication front ….
As the semiconductor industry advances from one technology node to the next, feature sizes continue to shrink and even shorter wavelengths are being employed. This trend is resulting in a number of problems that eventually affect manufacturing yields and hence cost. The traditional method of designing a chip or mask and then “throwing it over the wall” to manufacturing is fast becoming obsolete. With the newer generations of semiconductor technologies the number of mask layers and the finer lithography requirements are resulting in exponential increase in mask costs. Finer sub-sub micron geometry’s are going to result in prohibitive mask costs, which will affect the overall semiconductor business model going forward. Escalating mask and fabrication costs demand a tight partnership between customers and suppliers. By providing solutions that play an integral role in a customer’s success, suppliers assume a greater level of responsibility.

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