EVE Design Automation is on a mission-to become the leader in hardware-assisted functional verification and embedded software validation for any design size, regardless of complexity and topology, in any industry segment. Equipped with a patented hardware transactors’ technology that enables ZeBu to run at a high speed, EVE not only encourages their customers to use their transactors, but also provide them with software tools and training so that they can develop their own transactors.

Montu Makadia, Director and Country Sales Head, Eve Design Automation says, “Our emulation platforms set a new standard in very high performance at a low cost. The ZeBu platforms are housed in significantly smaller boxes compared to our competitors to achieve an order of magnitude and higher speed.”
Established in 2000 by four scientists and engineers with prior experience in emulation at Mentor Graphics, EVE has evolved into a major player in emulation, with more than 300 systems installed worldwide at major semiconductor companies in the USA, Asia and Europe. In India the company intends to work with local design and development companies and larger defense labs and space application centers which have been using FPGA-based prototyping boards and help them overcome the challenges they face while moving to larger designs.

According to Montu, 70 percent of the development cycle of an SOC design is consumed on verification. “The trend is not relenting, rather, if anything is getting worse because of the increasing complexity of today SOC designs and the explosion of embedded software content in them. Hardware/software co-verification has become a critical mission to harness the above trends. Here is where we help our customers with our Zebu fast emulation platforms,” he explains.

At DAC 2009, EVE launched the sixth generation of their emulation platforms called ZeBu-Server. Maintaining the fundamental philosophy of the original design approach, the latest ZeBu member removes the weaknesses of previous generations like limited design capacity, slow compile time and limited design debugging flexibility.

They use Zebu Flow and a large catalog of verification IP including families of transactors like USB, PCIe, AXI, video, audio and an extensive catalog of memory models like SDR, DDR, DDR2, DDR3 GDDR5 which ease and accelerate the mapping of the design-under-test into the emulator and the creation of a test environment around the design-under-test.