The tools, which set new performance standards for design-for-manufacturability
(DFM) solutions, enable designers and manufacturers of complex integrated circuits to accurately predict and avoid systemic errors that impact manufacturing yields and harm bottom lines.
"It's become very expensive to wait for months to find a mistake in the design or manufacturing process of ICs. Such errors can carry catastrophic cost consequences," DFMSim's chief executive officer Anantha Sethuraman had said at the launch.
In a market crowded with competitors, DFMSim introduced the "virtual factory" tool suite. The suite blends analysis and process simulation capabilities to enable designers and manufacturers verify whether the manufacturing matches what was originally intended.
Founded in 2005, and headquartered in Silicon Valley, with an R&D hub in Germany, DFMSim's technology is already installed at four customer sites across three continents, where it is delivering substantial yield improvements to a mix of foundries and fabless semiconductor manufacturers. The company's customers are tapping its solutions to accelerate their yield ramps and time to market.
Clarity amid complexity