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February - 2014 - issue > 10 Most Promising Semiconductor Companies

Adroit IC Design: Reducing Die Area and Power Consumption with smart IC Design

SI Team
Thursday, February 6, 2014
SI Team
Last decade saw a large number of devices coming in the market which are smaller in sizes but bigger in the functionalities they offer. With this technological revolution, integrated circuits are becoming increasingly complex and expensive, the industry began to embrace new design and reuse methodologies that are collectively referred to as system-on-chip (SoC) design. Today, performance, area and power consumption are the main issues in designing SoCs. Static Random Access Memory (SRAM) is a fundamental constituent of all SoCs and largest in terms of chip area; making up to half of the active area on a SoC. Bangalore based Adroit IC Design is a semiconductor company which designs next generation Intellectual Properties (IP) in cutting edge process technology nodes. The main focus of the company is to design embedded IP (memories, logic cells, analogue) using novel architectures to reduce area, speed and power (ASAP).

Founded in 2013 by CEO Deep Masiwal, Adroit IC design works with a mission to develop IP products in latest process technology nodes to reduce the Die Area and Power Consumption using the best circuit design techniques. The company believes that India has strong capabilities in digital technologies but lacks the requisite number of engineering graduates capable of handling analog technologies. In this quarter, the company provides training in cutting edge technologies to bridge the knowledge gap.

IC design teams face a constant pressure to make end user products smaller, more reliable, and less expensive, with advanced features and superior performance, all in the face of decreasing product life cycles. Adroit IC Design provides high quality consultancy services in the areas of custom IC design, power & signal integrity, FE Verification and others to meet "time to market" needs for various customers.

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