Xilinx qualifies 40nm FPGAs at UMC

By siliconindia   |   Monday, 25 January 2010, 18:25 IST
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Bangalore: Semiconductor foundry UMC and programmable logic solutions provider Xilinx have jointly announced production qualification for Virtex-6 FPGA family by Xilinx built using UMC's 40 nanometer (nm) logic process technology. The qualification is the result of the close work between engineering teams from both companies to further enhance yield, reliability and cycle time. The full qualification of the Virtex-6 family signifies the transition to 40nm volume production following UMC's first shipments of the devices in March 2009. "We highly value the ongoing execution of our long time manufacturing partner UMC. We have collaborated together to deliver several generations of industry leading FPGA families," said Xilinx CEO Moshe Gavrielov. Built using third-generation Xilinx ASMBL architecture, the company claims that Virtex-6 FPGA family delivers 15 percent higher performance and 15 percent lower power consumption compared to competitive 40nm FPGA offerings. The devices operate on a 1.0 volt core voltage with an available 0.9v low-power option and are supported by a new generation of development tools delivered by ISE Design Suite 11 and a vast library of IP already available for the market leading 65-nm Virtex-5 FPGA family to ensure productive development and design migration. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. "The successful qualification of Virtex-6 is the result of the close teamwork between Xilinx and UMC engineers to address the challenges of 40nm high performance technology," said S.C. Chien, Vice President of Advanced Technology Development at UMC.