Xilinx Virtex-6 FPGA compliant with PCI Express 2.0 specification

By siliconindia   |   Wednesday, 29 July 2009, 17:30 IST
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Bangalore: Xilinx, a programmable logic devices supplier, has announced that its newest generation Virtex-6 FPGA family is compliant with the PCI Express 2.0 specification. The second-generation PCIe block integrated in Xilinx Virtex-6 FPGAs has passed PCI-SIG PCI Express version 2.0 compliance and interoperability testing for 1-8 lane configurations. Xilinx has once again teamed up with key alliance members Northwest Logic and PLDA to provide Direct Memory Access (DMA) intellectual property (IP) cores for Virtex-6 FPGAs. This latest collaboration builds on their existing PCIe 2.0 soft IP for Virtex-5 FXT devices, the first FPGA to provide PCIe 2.0 x8-lane support with the Northwest Logic DMA core. "With increasing adoption of PCIe Gen2 for meeting high bandwidth connectivity requirements, many of the system design houses in India are increasingly engaging global customers in use of this protocol as part of their overall system designs," said Neeraj Varma, Country Manager - Sales, for India, Australia and New Zealand at Xilinx. Designers can immediately begin the evaluation and design of PCI Express 2.0 compliant systems in Virtex-6 FPGAs. "The demand for high-bandwidth connectivity is insatiable, and the PCIe 2.0 standard is critical to meet the requirements of high performance, low power applications, especially in the telecommunications and server markets," said Tom Feist, Senior Marketing Director for ISE Design Suite at Xilinx.

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