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Magma's new solutions for low-cost programmable IC platforms
By siliconindia staff writer
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Thursday, 10 June 2004, 19:30 IST
BANGALORE: Magma Design Automation Inc.(Nasdaq: LAVA), a provider of chip design solutions, today announced unified synthesis and physical design products for FPGA and low-cost structured ASIC designs. With the addition of these products Magma now offers designers a common implementation flow for FPGA, structured-ASIC and standard-cell designs. Blast FPGA is Magmas unique RTL-to-FPGA solution. This new product leverages the same advanced RTL synthesis technologies of Blast Create, Magmas RTL-to-placed-gates solution, and the physical synthesis technologies from PALACE, Magmas flagship product for programmable logic devices. PALACE is available to a large FPGA customer base and continues to provide users with an average of 20 percent better timing and 10 percent smaller area than most competitive tools.
Magmas Blast SA is the first complete RTL-to-GDSII solution for structured-ASIC designs. Blast SA builds on the production-proven gain-based synthesis technologies in Blast Create, Blast Fusion and Magmas unified data model. It supports structure-specific RTL synthesis, physical synthesis, DFT designs; clock generation and noise-aware routing for multiple types of structured ASICs in nanometer technologies; and provides a fast and predictable path from RTL to structured-ASIC silicon.
The development cost of a complex 90-nanometer design is expected to reach over $40 million and will take seven to nine months to complete, said Anand Anandkumar, managing director, Magma Design Automation India. For lower-volume, less-complex chips, designers need more cost-effective design solutions. With the introduction of Blast FPGA and Blast SA, Magma extends its leadership in IC implementation solutions for cell-based designs, and now provides IC designers a full range of design solutions that are easy to adopt and offer high quality of results, as well as rapid turnaround time.