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IIT develops telecom, power chips
By siliconindia staff writer
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Friday, 14 May 2004, 19:30 IST
KOLKATA: IIT Kharagpur has successfully designed complete chip sets for communications and power supply sectors with technology support from Cadence Design Systems (India) Pvt Ltd.
P P Chakrabarti, dean of sponsored research and industrial consultancy, IIT (K), said the VLSI lab of the institute has "taped out complete analog, RF and mixed-signal chipsets using Cadence Virtuoso custom design platform".
The chip sets are primarily targeted at communications and power supply markets, he said.
"This is a significant milestone as our students have demonstrated the ability to translate theory instruction into a working electronic device.
Their exposure to and use of Cadence's industry-leading EDA technology greatly complements their skills," Chakrabarti, also the professor-in-charge of the advanced VLSI design laboratory, said.
Himanshu Singh, executive director (India and SAARC), Cadence Design Systems Inc, US, said the company has tied up with all the IITs and provided technology support, but IIT(K) "was the first to come out successfully with such complete chip sets".
The Indian subsidiary of the US-based $1.1 billion electronic design and application software firm has provided its tools to 55 institutes in India at non-commercial rates to train manpower required for the industry .