Flextronics partners with Magma, eASIC

By siliconindia   |   Wednesday, 09 June 2004, 19:30 IST
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SANTA CLARA: Flextronics Semiconductor, a business unit of Flextronics, the world’s leading Electronics Manufacturing Services (EMS) provider, has partnered with Magma Design Automation Inc. (Nasdaq: LAVA) and eASIC Corporation to provide an optimal structured ASIC solution. “There is a need in the market for quick turn-around time ASIC solutions with lower development costs” said Elli Yaniv, General Manager, Flextronics Semiconductor. “Our partnership with eASIC, an innovative structured ASIC technology company and Magma, a leading EDA tool provider, will meet this need.” “We are extremely pleased to partner with Flextronics and Magma to introduce to the market a complete Structured ASIC solution, from RTL to manufacturing,” said Zvi Or-Bach, eASIC President and CEO. “Our customers can enjoy very low-cost ASICs with reduced development cycles by using the winning combination of eASIC’s innovative technology, Flextronics’ world-class design and manufacturing service expertise, and Magma’s state-of-the-art design tools. This partnership highlights our commitment to customer success and further validates the significance of eASIC’s technology and the crucial market need for an alternative solution to Standard Cell or FPGA." “Magma partnered with Flextronics and eASIC to enable a complete, low-cost RTL-to-GDSII ASIC solution designed specifically for eASIC Via programmable architecture,” said Behrooz Zahiri, director of marketing at Magma. “The combination of Magma’s structure-specific FPGA optimization capabilities and ASIC technologies offers a high quality and predictable solution within a single unified environment.” Magma’s Blast SA is the first complete RTL-to-GDSII solution for structured-ASIC designs. Blast SA builds on the production-proven gain-based synthesis technologies in Blast Create, Blast Fusion®, and Magma’s unified data model. It supports structure-specific RTL synthesis, physical synthesis, DFT designs, clock generation and noise-aware routing for multiple types of structured ASICs in nanometer technologies, and provides a fast and predictable path from RTL to structured-ASIC silicon. For a Structured ASIC implementation demonstration, visit the Magma booth #3919 at DAC 2004 from June 7th to June 11th at the San Diego Conference Center.