One of the byproducts of an increasingly technology-driven society is the inevitable migration of computing power from the computer to an endless number of other devices we interact with on a daily basis. Demand for these “smart devices” has put increasing pressure on makers of the application specific chips (ASICs) that have traditionally been used to run these devices. With so many new applications and services emerging, the time-consuming and costly ASIC development cycle no longer makes economic sense in many rapidly changing markets.

Is it hardware or software?

Proceler, a Berkeley, Calif. and Atlanta, GA-based startup, has created a set of tools designed to significantly lower the development costs and shorten the design cycle associated with developing chips used in embedded systems. The company’s product is a generic development environment that can take an application written by a software developer in C and, in a matter of minutes, load it onto what the company calls a “soft processor.” The soft processor is a piece of hardware that looks and acts like software. It has a malleable architecture that enables it to adapt and morph to meet the needs of a specific application.

Proceler is the brainchild of Naren Nachiappan and Dr. Krishna Palem, co-founders of the company and its CEO and CTO, respectively. Palem, who is a pioneer in the esoteric field of malleable soft processor architecture, says that the original premise for the company came out of research he did at NYU in the late 1990s. “We asked ourselves, what if you want to use malleable or soft modeling hardware but you don’t know anything about hardware design?” he explains. After two full years of development, Proceler’s answer to that question is its Variable Architecture for Reconfigurable Computing (Vaarc) Evaluator.

Tailors of Silicon Valley

Vaarc can be loosely described as an extremely sophisticated and flexible compiler. Compilers are translators that convert programming code into executable logic that a processor can make sense of. Vaarc is able to assemble the ideal architecture for a given application by using a set number of universal building blocks that can be glued together in myriad ways. The building blocks themselves are isolated areas of repetitive code, also called loops, which make the process of compiling the application code to hardware more manageable. “Our product systematically builds on existing compiler technology but at the same time generalizes it,” says Palem.

Vaarc has the potential to revolutionize the chip development process because it promises to remove the wall that has traditionally existed between application developers and those involved in hardware design. Traditionally, programmers write applications and then ASIC or microprocessor developers make design decisions about how the chip will be put to silicon. Proceler’s technology handles the tricky task of compiling code to hardware, meaning programmers and developers don’t need to rely on others with extensive knowledge of hardware design. It also means that each new application does not require its own hardware design cycle. “For an embedded software developer, the use of our technology makes the hardware design element transparent,” says Palem.

Lower costs, more markets

Proceler’s technology also promises to open up new markets for embedded-systems makers. Today, in order to recoup the high development costs associated with ASIC development, manufacturers must target high-volume markets such as consumer electronics devices like Sony’s GameBoy. But Palem claims there are lots of untapped mid- and lower-volume markets for embedded technology. “If the embedded systems market is going to experience the kind of growth most people are anticipating, these devices can’t just target high-volume applications,” he says. Proceler claims its development environment can shorten design time from nine months to a few weeks or even days.

Proceler plans to sell Vaarc to chip manufacturers and developers and then collect royalties on each processor produced using its technology. Palem says two large potential customers on the manufacturing side are reconfigurable chip leaders Xilinx and Altera.

Let the chips fall

Vaarc will be available to customers later this month. Proceler is currently offering an introductory product, dubbed Evaluator, which is designed to give potential customers a taste of what its technology can do. Evaluator provides a cost-performance analysis of an application, detailing how many cycles it took to run it, how much power it used up, and what size chip it would need to run on. That information can be used to determine whether it is cost effective to proceed in developing a processor for the application. Evaluator is currently available for free download from the company’s Web site.

For Proceler, the true test will come in the ensuing months. The 15-person company has raised a little under $5 million in two rounds of funding and plans to close its next round sometime this summer. Customer wins will be a must.