November - 2008 issue > Spotlight: Semiconductor

By si Team

There's a smarter way to run verification than today's constrained-random approaches believes Nusym Technology. The traditional constrained random approach is to generate tests, essentially randomly, without taking into account design structures or design considerations. It’s based on the spec that is encoded in the testbench; so if you change the design from design 1 to design 2, the test that it would generate would be identical. Nusym Technology, is pioneering an "intelligent" functional verification approach that enables rapid verification closure. This approach requires little change in current verification methodologies and takes advantage of testbenches and reference models. However, unlike current methods which treat the design as a "blackbox", Nusym uses design understanding to provide targeted test generation.

Nusym was founded in 2004 by Chris Wilson, Kenneth Imboden and David Gold, with the vision to provide tools that enable confidence in the design at a fraction of today's cost in time and resources, tools that could be used by hardware designers and verification engineers alike with no more than one hour of training, tools that automate most of the "grunt work" being done in verification today, and tools that provide insights into design which were previously unavailable.

Headquartered in Los Gatos, California with an additional office in Bangalore, India, Nusym employs 30 EDA software developers. Early product offerings are in use at leading semiconductor companies, and the company has attracted the attention of industry commentators, analysts, and the technical press.
The company recently raised $8 million in new Series B financing from Voyager Capital. The company will use the new capital to refine and introduce its intelligent verification product line which utilizes design insight to enable rapid verification closure.

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